Die Attach Process Analysis of Enhanced Stand-off Stopper on Tapeless Leadframe
E. Graycochea Jr. *
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
F. Gomez
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
R. Rodriguez
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
B. Bacquian
New Product Development and Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027, Philippines.
*Author to whom correspondence should be addressed.
Abstract
Improvement on the process and design is often a reliable way to resolve a problem especially in semiconductor industry. This paper presents a leadframe or semiconductor carrier merged with a stand-off design structure that will maintain a consistent bond line thickness (BLT) criteria for quad-flat no-leads (QFN) packages. Through package and process conceptualization, the stand-off design located on the leadframe underneath the silicon die corners would result to a steady and consistent BLT during die attach process. With the improved design, die tilt occurrence in die attach process would be mitigated.
Keywords: Quad-flat no-leads, bond line thickness, stand-off design, die attach, leadframe.