Stress Modeling Study on Package Crack Due to Debris
Jefferson Talledo *
STMicroelectronics, Inc., Calamba City, 4027, Laguna, Philippines.
*Author to whom correspondence should be addressed.
Abstract
Very thin semiconductor package is very prone to package crack. This paper discusses the stress modeling study conducted to understand the package crack problem in a specific smart card package. Finite element analysis (FEA) was used to analyze the maximum package stress level and corresponding location to find out if the presence of debris during the package assembly punching process could cause such problem and how it would happen. Based on the stress results, it was confirmed that even with a 60μm-thick piece of debris under the package, crack at the top is possible due to package bending and mold stress exceeding the flexural strength of the package mold material. The stress increases as the debris location is moved closer to the area where force is applied during the punching process. The study shows that the presence of debris should not be taken for granted though how small the debris may seem because significantly high bending stress could still be induced especially for very thin packages. Eliminating any source of debris in the package assembly process.is very important to prevent package crack.
Keywords: Package crack, debris, slug, package bending, stress modeling.