Mitigating Wafer Edge Cut Defect through Tensionless Tape Lamination Technique

Bryan Christian S. Bacquian *

New Product Development & Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027 Philippines.

Frederick Ray I. Gomez

New Product Development & Introduction, STMicroelectronics, Inc., Calamba City, Laguna, 4027 Philippines.

*Author to whom correspondence should be addressed.


Abstract

Thinner and smaller packages require thinner vertical structure of the integrated circuit (IC) design with the wafer playing essential role in package thinning. As the wafer goes thinner, problems may occur in the pre-assembly or wafer preparation. With the introduction of new pre-assembly technology such as laser die attach film (DAF) cut and dicing before grinding, technical challenges were expected. The paper focused on eliminating the edge cutting issue by considering the appropriate taping lamination technique. Tensionless lamination helped eliminate the horizontal pressure applied into the tape thus mitigating the edge cutting problem.  For future works, the configuration shared in this paper could be applied on wafers with comparable technology.

Keywords: Pre-assembly, edge cut, lamination, silicon die


How to Cite

Bacquian, Bryan Christian S., and Frederick Ray I. Gomez. 2020. “Mitigating Wafer Edge Cut Defect through Tensionless Tape Lamination Technique”. Journal of Engineering Research and Reports 13 (3):41-44. https://doi.org/10.9734/jerr/2020/v13i317103.

Downloads

Download data is not yet available.